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Please use this identifier to cite or link to this item: http://bura.brunel.ac.uk/handle/2438/13231
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dc.contributor.authorAmstutz, C-
dc.contributor.authorBall, FA-
dc.contributor.authorBalzer, MN-
dc.contributor.authorBrooke, J-
dc.contributor.authorCalligaris, L-
dc.contributor.authorCieri, D-
dc.contributor.authorClement, EJ-
dc.contributor.authorHall, G-
dc.contributor.authorHarbaum, TR-
dc.contributor.authorHarder, K-
dc.contributor.authorHobson, PR-
dc.contributor.authorIles, GM-
dc.contributor.authorJames, T-
dc.contributor.authorManolopoulos, K-
dc.contributor.authorMatsushita, T-
dc.contributor.authorMorton, AD-
dc.contributor.authorNewbold, D-
dc.contributor.authorParamesvaran, S-
dc.contributor.authorPesaresi, M-
dc.contributor.authorReid, ID-
dc.contributor.authorRose, AW-
dc.contributor.authorSander, O-
dc.contributor.authorSchuh, T-
dc.contributor.authorShepherd-Themistocleous, C-
dc.contributor.authorShtipliyski, A-
dc.contributor.authorSummers, SP-
dc.contributor.authorTapper, A-
dc.contributor.authorTomalin, I-
dc.contributor.authorUchida, K-
dc.contributor.authorVichoudis, P-
dc.contributor.authorWeber, M-
dc.date.accessioned2016-09-26T11:47:47Z-
dc.date.available2016-08-12-
dc.date.available2016-09-26T11:47:47Z-
dc.date.issued2016-
dc.identifier.citationIEEE-NPSS Real Time Conference, RT, (2016)en_US
dc.identifier.isbn9781509020140-
dc.identifier.urihttp://bura.brunel.ac.uk/handle/2438/13231-
dc.description.abstractThe CMS collaboration is preparing a major upgrade of its detector, so it can operate during the high luminosity run of the LHC from 2026. The upgraded tracker electronics will reconstruct the trajectories of charged particles within a latency of a few microseconds, so that they can be used by the level-1 trigger. An emulation framework, CIDAF, has been developed to provide a reference for a proposed FPGA-based implementation of this track finder, which employs a Time-Multiplexed (TM) technique for data processing.en_US
dc.description.sponsorshipThe research leading to these results has received funding from the People Programme (Marie Curie Actions) of the European Unions Seventh Framework Programme FP7/2007- 2013/ under REA grant agreement n [317446] INFIERI “Intelligent Fast Interconnected and Efficient Devices for Frontier Exploitation in Research and Industry”. This work was supported in part by the the UK Science and Technology Facilities Council, we gratefully acknowledge their support.en_US
dc.language.isoenen_US
dc.publisherIEEEen_US
dc.subjectLHCen_US
dc.subjectHL-LHCen_US
dc.subjectCMSen_US
dc.subjectPhase-2 upgradeen_US
dc.subjectTrack triggeren_US
dc.subjectHough transformen_US
dc.subjectEmaulationen_US
dc.subjectFPGAen_US
dc.subjectVHDLen_US
dc.subjectCIDAFen_US
dc.titleEmulation of a prototype FPGA track finder for the CMS Phase-2 upgrade with the CIDAF emulation frameworken_US
dc.typeConference Paperen_US
dc.identifier.doihttp://dx.doi.org/10.1109/RTC.2016.7543110-
dc.relation.isPartOf2016 IEEE-NPSS Real Time Conference, RT 2016-
pubs.publication-statusPublished-
Appears in Collections:Dept of Electronic and Electrical Engineering Research Papers

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