Please use this identifier to cite or link to this item: http://bura.brunel.ac.uk/handle/2438/2988
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dc.contributor.authorShankar, A-
dc.contributor.authorGilbert, D-
dc.contributor.authorJampel, M-
dc.coverage.spatial10en
dc.date.accessioned2009-01-29T13:07:41Z-
dc.date.available2009-01-29T13:07:41Z-
dc.date.issued1996-
dc.identifier.citationProceedings of INAP-96: The 9th Symposium and Exhibition on Industrial Applications of Prolog, Tokyo, Japan, 16-19 October 1996.en
dc.identifier.urihttp://bura.brunel.ac.uk/handle/2438/2988-
dc.description.abstractIn this paper describes the design of a transient analysis program for linear circuits and its implementation in a Constraint Logic Programming language, CLP(R). The transient analysis program parses the input circuit description into a network graph, analyses its semantic correctness and then performs the transient analysis. The test results show that the program is at least 97% accurate when run at two decimal places. We have also compared the performance of our program with a commercial package implemented in an imperative language. The advantages of implementing the analysis program in a CLP language include: quick construction and ease of maintenance. We also report on the synthesis of generation of a circuit with given transient characteristics.en
dc.format.extent60883 bytes-
dc.format.mimetypeapplication/pdf-
dc.language.isoen-
dc.publisherINAPen
dc.titleTransient analysis and synthesis of linear circuits using constraint logic programmingen
dc.typeConference Paperen
Appears in Collections:Computer Science
Dept of Computer Science Research Papers

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