Assembling strategies in extrinsic evolvable hardware with bi-directional incremental evolution

Please use this identifier to cite or link to this item: http://bura.brunel.ac.uk/handle/2438/2518

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DC Field	Value	Language
dc.contributor.author	Baradavka, I	-
dc.contributor.author	Kalganova, T	-
dc.coverage.spatial	10	en
dc.date.accessioned	2008-07-21T15:37:46Z	-
dc.date.available	2008-07-21T15:37:46Z	-
dc.date.issued	2003	-
dc.identifier.citation	Proceeding of the 6th European Conference on Genetic Programming, EuroGP2003, Essex, UK, 2003. vol. 2610, pp. 276-285	en
dc.identifier.uri	http://bura.brunel.ac.uk/handle/2438/2518	-
dc.description.abstract	Bidirectional incremental evolution (BIE) has been proposed as a technique to overcome the ”stalling” effect in evolvable hardware applications. However preliminary results show perceptible dependence of performance of BIE and quality of evaluated circuit on assembling strategy applied during reverse stage of incremental evolution. The purpose of this paper is to develop assembling strategy that will assist BIE to produce relatively optimal solution with minimal computational effort (e.g. the minimal number of generations).	en
dc.format.extent	624724 bytes	-
dc.format.mimetype	application/pdf	-
dc.language.iso	en	-
dc.publisher	Springer	en
dc.title	Assembling strategies in extrinsic evolvable hardware with bi-directional incremental evolution	en
dc.type	Conference Paper	en
Appears in Collections:	Electronic and Computer Engineering Dept of Electronic and Electrical Engineering Research Papers

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