Modular decomposition of the NOR-TSUM multiple-valued PLA

Kalganova, T; Lipnitskaya, N; Holowinski, G

Please use this identifier to cite or link to this item: http://bura.brunel.ac.uk/handle/2438/2505

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DC Field	Value	Language
dc.contributor.author	Kalganova, T	-
dc.contributor.author	Lipnitskaya, N	-
dc.contributor.author	Holowinski, G	-
dc.coverage.spatial	7	en
dc.date.accessioned	2008-07-18T14:38:00Z	-
dc.date.available	2008-07-18T14:38:00Z	-
dc.date.issued	1997	-
dc.identifier.citation	Proceeding of the 19th International Scientific Symposium of Students and Young Research Workers. Zielona Gora, Poland, 1997. pp.138-144.	en
dc.identifier.uri	http://bura.brunel.ac.uk/handle/2438/2505	-
dc.description.abstract	A method for designing PLA-based combinational circuits by modular decomposition is presented. Main subjects are 1) Specific properties of TSUM operator, 2) MIN-TSUM and NOR-TSUM expansions with respect to the bound set, X1 of variables, 3) Realization of functions by multiple-valued PLA-based combinational circuits, 4) Comparison with other methods. Experimental investigations show that the size of suggested combinational circuit is the same as the size of multiple-valued PLA implementing a multiple-valued logic function with large number of variables.	en
dc.format.extent	777010 bytes	-
dc.format.mimetype	application/pdf	-
dc.language.iso	en	-
dc.publisher	Committees of International Scientific Symposium of Students and Young Research Workers	en
dc.subject	Multiple-valued logic; modular decompositions; logic design; multiple-valuedprogrammable logic array (MV PLA)	en
dc.title	Modular decomposition of the NOR-TSUM multiple-valued PLA	en
dc.type	Conference Paper	en
Appears in Collections:	Electronic and Computer Engineering Dept of Electronic and Electrical Engineering Research Papers

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