Design of Energy Efficient Snubber Circuits for Protection of Switching Devices in High Power Applications

Abstract

Semiconductor devices are subjected to elevated levels of dv/dt and di/dt when used at high voltage high current and elevated temperature applications. To reduce the stress from semiconductor switches, turn-on snubber circuits are used during the turn on time and turn-off snubber circuits during the turn-off time. In low power applications where the switching losses is not significant these can be ignored. Over the last few years, Voltage Controlled Voltage Source (VCVS) applications in High Voltage Direct Current (HVDC) has increased particularly with the use of Multilevel Converters (MLCs). Switching Losses in such high power applications now needs to be considered as it is no longer insignificant. Energy efficient snubber circuits (EESCs) became available only for low power applications according to the literature review. The research dealt with the design of EESCs in high power cascaded H-bridge MLCs. The main contributions made were: - (1) A critical review of present snubber circuits. (2) Design of energy efficient snubber circuits. (3) Design of Safe Operating Area (SOA) was possible by application of COMSOL thermal simulation for the power switch used in MLCs. (4) A reduction in switching power loss of 1782 MWh before EESC and 1379 MWh after the EESC (22.6%), which is an annual reduction of 403MWh, which impacts on the reduction in Global Warming. (5) Significant annual cost benefits from £125,000 to £68,612 (55%) in the reduction of wasted switching dissipated energy. (6) Additional benefit in the connection of inductors in the EESCs, resulted in a reduction of harmonic levels of 6% at V3 down to 1.5% at V7. Optimisation methods, like Particle Swarm Optimisation (PSO) and Graduated Reduction Gradient (GRG) were used to evaluate individual components in the proposed EESCs. Use of COMSOL thermal simulation software was critical in the design of the power IGBT SOA. A case study of 250 kW station, a reduced scale of a typical HVDC station of 2000 MW (for example Sellindge HVDC station), based on 7-level MLC used Isolated Gate Bipolar Transistors (IGBTs) to evaluate the annual reduction in power losses and reduction in cost. If an upward trajectory is computed, based on the number of UK HVDC Converter stations, enormous economic and energy recovery can result with significant impact towards a decrease in global warming. The results obtained validated the research goals and identified a high potential for the application of EESCs in HVDC.